Summary - CadenceCONNECT: AI Workflows to Agentic Stack with ViraStack AI Super Agent

Because timing closure wasn't hard enough, now we have AI too.

Join fellow chip designers, implementation engineers, and technology leaders for a day of practical insights, technical deep dives, and real conversations about the future of semiconductor design. From analog design-to-system thinking to AI-powered and agentic workflows, discover how leading teams are tackling complexity, improving productivity, and bringing better silicon to market faster.

Expect real-world insights, technical deep dives, practical demonstrations, and plenty of opportunities to connect with peers who understand
exactly what "one more ECO" mean.

What You’ll Experience:

Virtuoso AI Studio ViraStack Agentic Workflows: Autonomous multi-agent orchestration integrated
directly into custom and analog IC design flows, with user guidance through natural language and design intent
understanding via the Mental Model.
Verification Testbench Debug/Verification Agent: Configures simulation setups, enables deeper understanding of results,
and uses intelligent debugging to identify and resolve issues faster.
Design Centering & Optimization Agent: Drives optimization and design-centering flows,
including automated parameterization setup, optimization execution, and post-run analysis with actionable insights.
Design Migration Agent: Automatically translates custom circuits from source to target nodes.
Together with the Optimization Agent and IP Catalog Agent, it significantly reduces design cycle time.
Layout Agent: Automates floorplanning, placement, and routing using best-in-class engines,
providing multiple options for a faster first-pass layout.
IP Catalog/Design Creation Agent: Enables the creation of an IP repository, facilitates the reuse of existing designs,
and creates new ones through the Mental Model.