Munich Agenda

Date: Thursday, November 20

Location: Cadence Design Systems, Mozartstraße 2, 85622 Feldkirchen, Germany

Parking: There is free parking around the office building. 

Agenda subject to change

Time

Presentation Title

Presenter / Company

08:30 - 09:00

Registration and Welcome Coffee

09:00 - 09:15

Welcome and Introduction

Muhammad Ul Haque Khan, Cadence

09:15 - 10:15

10:15 - 11:00

Jasper Update and Roadmap

Improving Productivity with Jasper AI Assistants

Jin Zhang, Cadence

Muhammad Ul Haque Khan, Cadence

11:00 - 11:30

Coffee Break

11:30 - 11:50

11:50 - 12:10

12:10 - 12:30

Adopting Jasper Security Path Verification for NoCs

Exploring Formal in Datapath Verification

Improving Register Map Verification Flow with Jasper CSR

Jan Hahlbeck, NXP Semiconductors

Vaishnavi Thorve, Ericsson

Timur Ganeev, EM Microelectronics

12:30 - 14:00

Lunch Break

14:00 - 14:30

Maximizing PPA Optimization Potential with Jasper SEC

Joerg Mueller, Cadence

14:30 - 15:00

Taking Formal Verification to a Higher Level with Jasper C Apps

Barbara Jobstmann, Cadence

15:00 - 15:30

15:30 - 16:00

AI Assisted Formal Verification

Reliable Hardware Trojan Detection for RISC-V Processors using Formal Verification

Tivadar Mako, Microsoft

Christian Appold, Denso

16:00 - 16:30

Coffee Break

16:30 - 17:00

17:00 - 17:30

Achieving Formal Signoff with Bound Signoff Techniques

Unlocking the Full Potential of Jasper Visualize: Debug Updates

Diego Hernandez, Cadence

Muhammad Ul Haque Khan, Cadence

17:30 - 18:00

18:00 - 20:00

Q&A and Closing Remarks

Networking Dinner